The data in the Shift Register entries is loaded. Once per clock cycle, it moves the data to its output.

A shift register is made up of many single-bit "D-Type Data Latches," one for each data bit, either a logic "0" or "1," coupled in a serial type daisy-chain arrangement, with the output of one latch becoming the input of the next, and so on.

Data bits can be fed in or out of a shift register serially, that is, one after the other from the left or right, or in a parallel configuration, all at the same time.

Shift Registers are used in calculators and computers for data storage or data transfer. They are typically used to store data such as two binary numbers before they are added together, or to transform data from serial to parallel or parallel to serial formats. A single shift register's individual data latches are all driven by the same clock (Clk) signal, making them synchronous devices. Data bits can be fed in or out of a shift register serially, that is, one after the other from the left or right, or in a parallel configuration, all at the same time.

Shift register ICs typically have a clear or reset the connection, allowing them to be "SET" or "RESET" as needed. Shift registers generally function in one of four modes, with the basic data transfer through a shift register being.

There 4 types of the Shift Register. These are:

In this project the Serial-in to Serial-out (SISO) Shift Register was used. The data is serial "IN" and "OUT" of the register in the SISO Shift Register, one bit at a time, in either a left or right direction, under clock control. The SISO circuit can be seen in the Figure 4.

Also, the truth table of the SISO Shift Register can be seen in Figure 5.